1. Field of the Invention
The present invention relates to a semiconductor device having a self-aligned contact structure and a manufacturing method thereof.
2. Description of the Background Art
A Self-Aligned Contact (hereinafter simply as xe2x80x9cSACxe2x80x9d) in which a contact hole connecting to a source/drain region in a self-aligned manner to a film protecting gate electrode has been used. Since this conventional structure allows a contact hole reaching a source/drain region to be formed without considering the position of a gate electrode, and the structure is therefore essential in reducing the size of the transistor thereby reducing a semiconductor device. The structure has been therefore often employed for conventional DRAMs (Dynamic Random Access Memories). The SAC structure applied for these devices have a refractory metal silicide film on the gate electrode but not on source/drain regions.
In recent years, in order to further improve the performance of the semiconductor devices, efforts have been made to reduce the contact resistance between source/drain regions and contact interconnections. Therefore, a contact structure having a refractory metal silicide film both on the surfaces of source/drain regions and a gate electrode came to be a mainstream, particularly in logic-based devices.
In conventional salicide process where the entire surface of a silicon substrate is covered with a refractory film, followed by a heat treatment to cause the silicon to react with the refractory metal, so that the refractory metal silicide film is formed both on the surfaces of the source/drain regions and the gate electrode at a time, a protection film to cover the gate electrode cannot be formed. Therefore, a contact hole to connect to the source/drain region cannot be formed with the protection film covering the gate electrode. This is because a method of manufacturing a semiconductor device according to the conventional salicide process is as follows. A conventional method of manufacturing a semiconductor device where the upper surface of a gate electrode and the upper surface of source/drain regions are formed into silicide at a time will be now described in conjunction with FIGS. 25 to 40.
An isolation oxide film 102 to isolate an element forming region is formed on a p-type silicon substrate 101. A silicon oxide film 104 as thick as 3 nm for example to be a gate insulating film is formed in the element isolation region. Then, a polycrystalline silicon film 103 as thick as 200 nm is formed on silicon oxide film 104 and the state as shown in FIG. 25 is attained. As shown in FIG. 26, resist film 108 is patterned on polycrystalline silicon film 103. Using resist film 108 as a mask, etching is performed until a surface of silicon oxide film 104 to be a gate oxide film is exposed, followed by removal of resist film 108, and polycrystalline silicon film 103 forming a gate electrode as shown in FIG. 27 is attained.
Using polycrystalline silicon film 103 as a mask, an impurity to form a source/drain region 110 is implanted, and then a sidewall insulating film such as a sidewall silicon nitride film 109 is formed. Then, an impurity to form a source/drain region 111 is implanted to form an LDD (Lightly Doped Drain), and the state as shown in FIG. 28 is attained.
Then, a heat treatment is performed with a refractory metal film covering the entire surface of silicon substrate 101 to form a refractory metal silicide film 106 on the upper surface of polycrystalline silicon film 103 and on the upper surface of source/drain 111, a gate electrode 136 is formed, followed by removal of a non-reacted part of refractory metal film, and the state as shown in FIG. 29 is attained.
An NSG (Non Doped Silicate Glass) film 114 is formed to cover the entire surface of silicon substrate 101. Then, a silicon nitride film 115 is formed on NSG film 114. A BPSG (Boro-Phospho Silicate Glass) film 116 is formed on silicon nitride film 115. Then, the surface of BPSG film 116 is subjected to CMP (Chemical Mechanical Polishing) and flattened, and the state as shown in FIG. 30 is attained.
After forming a pattern of a resist film on source/drain regions 110 and 111 to form contact holes 131 and 132, etching is performed until a surface of silicon nitride film 115 is exposed. Then, contact holes 131 and 132 are further deepened so as to sequentially etch silicon nitride film 115 and NSG film 114, etching is performed until a surface of refractory metal silicide film 106 is exposed, and the state as shown in FIG. 31 is attained. Contact plugs 131a and 132a are formed to fill contact holes 131 and 132, and the state as shown in FIG. 32 is attained.
In a semiconductor device having a conventional SAC structure manufactured according to the manufacturing method described above, as shown in FIG. 31, a film to serve as a protection film cannot be formed on gate electrode 136 when contact hole 131 is formed. If therefore the position to form contact hole 131 reaching refractory metal film 106 on source/drain regions 110 and 111 is shifted to the side of gate electrode 136, not only a surface of refractory metal silicide film 106 on source/drain regions 110 and 111, but also a surface of refractory metal silicide film 106 on gate electrode 136 is exposed. Thus, as shown in FIG. 32, when contact plug 131a is filled in contact hole 131, gate electrode 136 and source/drain regions 110 and 111 could be short-circuited.
Therefore, a silicon nitride film to serve as a protection film may be previously formed on gate electrode 136. A method of manufacturing a semiconductor device according to which such a silicon nitride film to serve as a protection film is formed on the gate electrode will be described in conjunction with FIGS. 33 to 40.
Until the state shown in FIG. 25 is attained, the same steps as the manufacturing method described above are performed. As shown in FIG. 33, a silicon nitride film 107 is formed on polycrystalline silicon film 103. Then as shown in FIG. 34, resist film 108 is patterned on silicon nitride film 107. Then using resist film 108 as a mask, etching is performed until a surface of silicon oxide film 104 to be a gate oxide film is exposed, followed by removal of resist film 108 and silicon nitride film 107 to protect polycrystalline silicon film 103 to form a gate electrode as shown in FIG. 35 is formed.
Using polycrystalline silicon film 103 and silicon nitride film 107 as masks, an impurity to form source/drain region 110 is implanted, and a sidewall insulating film such as a sidewall silicon nitride film 109 is formed on the sidewalls of polycrystalline silicon film 103 and silicon nitride film 107. Then, an impurity to form source/drain region 111 is implanted to form an LLD (Lightly Doped Drain) structure and the state as shown in FIG. 36 is attained.
With a refractory metal film being deposited to cover the entire surface of silicon substrate 101, a heat treatment is performed to form a refractory silicide film 106 only on the upper surface of source/drain region 111, then a non-reacted part of the refractory metal film is removed, and the state as shown in FIG. 37 is attained.
An NSG film 114, a silicon nitride film 115 and a BPSG film 116 are sequentially formed to cover the entire surface of silicon substrate 101 in the same steps as those in the conventional manufacturing method according to which a protection film on the gate electrode, and the state as shown in FIG. 38 is attained.
A resist film is patterned to form contact holes 131 and 132 reaching refractory metal silicide film 106 on source/drain region 111, and then BPSG film 116, silicon nitride film 115, and NSG film 114 are sequentially formed on the gate electrode similarly to the conventional manufacturing method according to which a protection film is not formed on the gate electrode, and the state as shown in FIG. 39 is attained. Then, contact plugs 131a and 132a to fill contact holes 131 and 132 are formed, and the state as shown in FIG. 40 is attained.
In the method of manufacturing a semiconductor device according to which a silicon nitride film 107 to be a protection film is formed on polycrystalline silicon film 103 serving as a gate electrode, a refractory metal silicide film cannot be formed on the upper surface of the gate electrode because silicon nitride film 107 is formed immediately above polycrystalline silicon film 103 to form the gate electrode, which lowers the conductivity of the gate electrode.
Japanese Patent Laying-Open Nos. 9-326440 and 8-250603 disclose a technique of forming a refractory metal silicide film on a gate electrode and on a source/drain region, forming a protection film to cover the refractory metal silicide film forming the gate electrode and forming a contact hole to be connected to a source/drain region in a self-aligned manner to the protection film.
According to the invention as disclosed by Japanese Patent Laying-Open Nos. 9-326440 and 8-250603, the refractory metal silicide film formed on the gate electrode is formed by a tungsten silicide film. Thus, the impurity of the polycrystalline silicon film is absorbed by the refractory metal silicide film of a tungsten silicide film or vice versa, in other words, counter diffusion is caused. This counter diffusion disadvantageously causes a depletion layer to form and is conspicuous in miniaturized Dual Gate structures, impeding the scaling down of the semiconductor device.
The step of forming a contact hole reaching the gate electrode and interconnection layer covered by the protection film requires etching to penetrate through the protection film, and therefore cannot be performed simultaneously with the step of forming a contact hole reaching the source/drain region in a self-aligned manner to the protection film to cover the gate electrode as described above. As a result, the steps of forming the contact holes must be performed separately, which requires a large number of steps.
It is one object of the present invention to provide a further scaled down semiconductor device and a manufacturing method thereof, and another object of the present invention is to reduce the number of steps to form a contact hole reaching a gate electrode having a protection film and an interconnection layer.
A semiconductor device according to the present invention includes a silicon substrate having a first refractory metal silicide film formed by a reaction with a refractory metal film deposited on a main surface on an upper surface of a source/drain region, a gate electrode formed on the silicon substrate in a region between the source/drain regions and having a silicon containing film and a second refractory metal silicide film formed by a reaction of the silicon containing film and a refractory metal film deposited on the silicon containing film, a first insulating film formed to cover a surface of the gate electrode, a second insulating film formed to cover a surface of the first insulating film and the first refractory metal silicide film and etched at a speed higher than the etching speed of the first insulating film under a prescribed etching condition, and a contact hole formed through the second insulating film to reach the surface of one of the source/drain regions.
Thus, since the gate electrode is covered with the first insulating film having an etching speed relatively larger than the second insulating film with a prescribed etching gas, in other words, under a prescribed etching condition, a contact hole to reach the upper surface of one of the source/drain regions may be formed in a self-aligned manner to the first insulating film. Therefore, if the forming position of the contact hole is somewhat shifted to the side of the gate electrode, the gate electrode is protected by the first insulating film. As a result, even if transistors are reduced in size, semiconductor devices can be formed with the current alignment precision.
Since the first and second refractory metal silicide films are formed for example by a reaction of a refractory metal deposited on a silicon containing substrate or film such as a titanium silicide film or cobalt silicide film and the silicon in the substrate or film, when the gate electrode has a polycide structure of a polycrystalline silicon film and a refractory metal silicide film, an impurity included in the polycrystalline silicon film is less absorbed than the refractory metal silicide film including a tungsten silicide film formed by deposition. As a result, a depletion layer is restrained from being formed in the vicinity of the interface between the refractory metal silicide film and polycrystalline silicon film. Thus, the resistance of the gate electrode is reduced, which permits the film thickness and width of the gate electrode to be reduced. Therefore, a semiconductor device reduced in size and having a gate electrode with reduced resistance can be manufactured.
The semiconductor device according to the present invention may further include a buffer film having an expansion coefficient intermediate between the expansion coefficients of the first insulating film and the material forming the gate electrode between the first insulating film and the gate electrode.
Thus, in the manufacturing process of the semiconductor device, if a region having a transistor is heat-treated, stress caused at the gate electrode because of the difference between the first insulating film and gate electrode in the expansion coefficients can be relaxed by the buffer film. As a result, the reliability of the gate electrode is improved and the yield of the devices is improved.
More preferably, in the semiconductor device according to the present invention, the gate electrode includes a polycrystalline silicon film, the first insulating film includes a silicon nitride film and the buffer film formed between the polycrystalline silicon film and the silicon nitride film includes a silicon oxide film.
Thus, the use of the silicon oxide film having an expansion coefficient intermediate between those of the silicon nitride film and polycrystalline silicon film permits the film to serve as a buffer film. Such a silicon oxide film may be formed by thermally oxidizing a side surface of the polycrystalline silicon film forming the gate electrode, a thin buffer film may be formed. This method is therefore suitable for forming a buffer film formed between the gate electrode of the semiconductor device reduced in size and the protection film.
More preferably, in the semiconductor device according to the present invention, the first insulating film includes a silicon nitride film, and the buffer film formed between the second refractory metal silicide film and the silicon nitride film includes a silicon oxide film.
Thus, the silicon oxide film may form the buffer film, and therefore an existing method may be employed.
The semiconductor device according to the present invention may further include a shared contact hole formed through the first and second insulating films and reaching both the gate electrode and the other one of source/drain regions.
Thus, a contact hole is formed to reach one of the source/drain regions in a self-aligned manner, while a shared contact hole is formed to reach the other source/drain region and the gate electrode, and therefore the number of contact holes to form contact plugs is reduced. Therefore, a contact plug may be easily formed if the transistor structure is reduced in size, which permits the semiconductor device to be more scaled down.
More preferably, in the semiconductor device according to the present invention, all the first and second insulating films in the region to form the shared contact hole are removed.
Thus, as compared to the case in which the first insulating film partly remains at the bottom of the shared contact hole, the contact area between the gate electrode and the contact plug filled within the contact hole may be increased. Therefore, the contact resistance between the gate electrode and the contact plug can be reduced, so that the diameter of the contact plug can be reduced. As a result, the contact hole reaching the gate electrode can be more reduced in size, a semiconductor device having even more miniaturized transistor may be formed.
The semiconductor according to the present invention may further include a conductive layer covered with first and second insulating films, and a contact hole formed through the first and second insulating films and reaching the conductive layer.
Thus, the gate electrode and the interconnection layer are both protected by the first and second insulating films, a shared contact hole reaching the gate electrode and the source/drain regions and a contact hole reaching the conductive layer may be formed at a time. Thus, the number of steps required for forming the contact hole reaching the gate electrode having a protection film can be reduced.
A method of manufacturing a semiconductor device according to the present invention includes the steps of forming a first refractory metal silicide film formed by a reaction with a refractory metal film deposited on a main surface on a surface of a silicon substrate in source/drain regions, forming a gate electrode having a silicon containing film and a second refractory metal silicide film formed by a reaction of the silicon containing film and a refractory metal film deposited on the film containing film, forming a first insulating film to cover a surface of the gate electrode, forming a second insulating film to cover the first insulating film and the first refractory metal silicide film at an etching speed higher than that of the first insulating film under a prescribed etching condition, and forming a contact hole through the second insulating film to reach a surface of the source/drain regions.
Thus, since the first insulating film serves as a protection film in the step of etching the second insulating film, the contact hole to reach the upper surface of one source/drain region may be formed in a self-aligned manner to the first insulating film. Therefore, if the contact hole is formed shifted to the side of the gate electrode from the source/drain region, the gate electrode can be protected by the first insulating film. As a result, the yield may be improved in the scaled-down semiconductor device.
Since the second refractory metal silicide film is formed for example by a reaction of a silicon containing film such as a titanium silicide film or a cobalt silicide film and a refractory metal film deposited on the silicon containing film, a gate electrode having lower resistance than the tungsten silicide film formed by deposition is formed. As a result, a gate electrode having desired conductivity can be provided if the thickness of the gate electrode is reduced, so that an even more down-scaled semiconductor device can be manufactured.
By forming the first and second refractory metal silicide film in separate steps, the films may be controlled to have a desired thickness.
The method of manufacturing a semiconductor device according to the present invention may further include the step of forming a buffer film having an expansion coefficient intermediate between those of the first insulating film and the gate electrode before the step of forming the first insulating film after the step of forming the gate electrode.
Thus, a buffer film to relax stress caused at the gate electrode because of the difference between the first insulating film and the gate electrode in the expansion coefficients when a transistor region is heat-treated can be provided. Therefore, a gate electrode with higher reliability can be provided, so that a semiconductor with improved yield can be provided.
More preferably, by the method of manufacturing a semiconductor device according to the present invention, a film containing a polycrystalline silicon film is formed as the gate electrode, a silicon nitride film is formed as the first insulating film, and a silicon oxide film is formed as the buffer film between the polycrystalline silicon film and the first insulating film.
Thus, the use of the silicon oxide film having an expansion coefficient intermediate between those of the silicon nitride film and the polycrystalline silicon film permits the film to serve as a buffer film. The silicon oxide film is formed by thermal oxidation at a side of the polycrystalline silicon film forming the gate electrode, a thin buffer film may be formed. As a result, if a buffer film is provided between the gate electrode and the protection film, a semiconductor device reduced in size may be provided.
More preferably, by the method of manufacturing a semiconductor device according to the present invention, a silicon nitride film is formed as the first insulating film, and a silicon oxide film is formed as a buffer film between the first refractory metal silicide film and the first insulating film.
Thus, an existing method may be employed to form the buffer film with a silicon oxide film,
The method of manufacturing a semiconductor device according to the present invention may further include the step of forming a shared contact hole formed by removing the first and second insulating films to expose an upper surface of the gate electrode and an upper surface of the other source/drain region.
Thus, a contact hole may be formed to reach an upper surface of one source/drain region in a self-aligned manner to the first insulating film and a shared contact hole can be formed to reach the other source/drain region and the gate electrode.
More preferably, by the method of manufacturing a semiconductor device according to the present invention, in the step of a shared contact hole, the first and second insulating films in the region to form the shared contact hole are entirely removed.
Thus, as compared to the structure in which the first insulating film partly remains at the bottom of the shared contact hole, the contact area between the gate electrode and the contact plug filled within the contact hole can be increased. Therefore, the diameter of the contact plug can be reduced. As a result, the transistor structure can be further down-scaled, so that the semiconductor device may be even more reduced in size.
By the method of manufacturing a semiconductor device according to the present invention, in the step of forming a shared contact hole, a contact hole to expose a surface of the conductive layer covered with the first and second insulating films may be further formed in said first and second insulating films.
Thus, a shared contact hole reaching the gate electrode and an upper surface of the source/drain region and a contact hole reaching the conductive layer can be formed at a time, so that the number of steps included in the manufacture of a semiconductor device can be reduced.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.